Non-volatile memories are well known. Generally, a non-volatile memory is a computer memory that can retain stored information (e.g., a “0” bit or a “1” bit) even when the non-volatile memory is not powered. Flash memories and read-only memories are examples of non-volatile memories. Conventional non-volatile memories typically include multiple memory cells (e.g., flash memory cells) that are usually organized by rows and columns inside an array. Typically, the gates of a given memory cells are connected to one row of the array and the drains of the memory cells are connected to a column. To select a given memory cell, the memory cell is precharged/polarized at both the row to which it is connected (i.e., to polarize its gate) and the column/bitline to which it is connected (i.e., to polarize its drain). As discussed below, there are potential problems associated with the polarization of the bitline/drain of the selected memory cell.
In order to polarize (or precharge) the drain of the selected memory cell to the correct value, the bitline to which the drain is connected needs to be polarized to the correct value. Because of the size (and thus high capacitance) of the bitlines of a memory array, larger transistors are required to quickly polarize the bitline and drain of the selected memory cell. These large transistors are able to sink high current to the selected bitline to quickly precharge it and the drain to the correct value. There are several problems with conventional non-volatile memory systems using large transistors. For example, the very high current of large transistors can induce a voltage overshoot at the drain of the memory cell. A voltage overshoot may cause an erroneous reading of a given memory cell. For example, a memory cell containing a “1” bit may be erroneously read as carrying a zero bit, and vice versa.
Accordingly, what is needed is an improved sensing circuit. The present invention addresses such a need.